DoD FUNDING OPPORTUNITIES

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DARPA Microsystems Exploration – September 28, 2024

MTO seeks to develop high-risk, high-reward technologies that enable revolutionary advances in materials, devices, and microsystems and continue DARPA’s mission of creating and preventing strategic surprise. In order to capitalize rapidly on new opportunities, DARPA announces the Microsystems Exploration program which calls for faster responses with smaller, targeted investments.

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Pivot SBIR/STTR search – https://pivot.proquest.com/curated_opps/12769

 

ARPA-E EXPLORATORY TOPIC H2SENSE SBIR/STTR, Due 6/7/2024

This announcement is purposely broad in scope, and will cover a wide range of topics to encourage the submission of the most innovative and unconventional ideas in energy technology. The objective of this solicitation is to support high-risk R&D leading to the development of potentially disruptive new technologies across the full spectrum of energy applications. Topics under this FOA will explore new areas of technology development that, if successful, could establish new program areas for ARPA-E, or complement the current portfolio of ARPA-E programs.

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Small Business Innovation Research (SBIR) Program for CHIPS For America – CHIPS Metrology. Closes Jun 14, 2024

Recognizing that metrology is critical to enabling future microelectronics innovation, NIST has worked with stakeholders to identify the critical challenges requiring R&D. Information gained by NIST through a series of workshops, a request for information, and discussions with major companies has informed a proposed strategic path forward focused on seven Grand Challenges, outlined in the Strategic Opportunities for U.S. Semiconductor Manufacturing publication. For the Open Topic SBIR Section, the CHIPS Metrology SBIR program seeks applicants to propose innovation that relates to an outlined path forward elements identified in the Metrology Grand Challenges.

Grand Challenge 1: Metrology for Materials Purity, Properties, and Provenance

The challenge: Meet increasingly stringent requirements for semiconductor materials purity, physical properties, and provenance across a diverse supply chain through development of new measurements and standards.

Grand Challenge 2: Advanced Metrology for Future Microelectronics Manufacturing

The challenge: Ensure that critical metrology advances are made to keep pace with cutting-edge and future microelectronics and semiconductor manufacturing, while maintaining a competitive U.S. advantage.

Grand Challenge 3: Enabling Metrology for Integrating Components in Advanced Packaging

The challenge: Provide enabling metrology that spans multiple length scales and physical properties and supports acceleration of advanced packaging concepts for future-generation microelectronics.

Grand Challenge 4: Modeling and Simulating Semiconductor Materials, Designs, and Components

The challenge: Improve the tools needed to effectively model and simulate future semiconductor materials, processes, devices, circuits, and microelectronic system designs.

Grand Challenge 5: Modeling and Simulating Semiconductor Manufacturing Processes

The challenge: Seamlessly model and simulate the entire semiconductor value chain, from materials inputs to chip fabrication, system assembly, and end products.

Grand Challenge 6: Standardizing New Materials, Processes and Equipment for Microelectronics

The challenge: Create the standards and validation methods necessary to accelerate the development and manufacturing of future information and communication technologies.

Grand Challenge 7: Metrology to Enhance Security and Provenance of Microelectronic-based Components and Product

The challenge: Create the metrology advances needed to enhance the security and provenance of microelectronic components and products across supply chains and increase trust and assurance.

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DARPA Connect is a great resource to find more ways to connect to the DARPA community.